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Techniques for Optimizing Multiprocessor Implementations of Signal
Processing Applications An indispensable component of the
information age, signal processing is embedded in a variety of
consumer devices, including cell phones and digital television, as
well as in communication infrastructure, such as media servers and
cellular base stations. Multiple programmable processors, along
with custom hardware running in parallel, are needed to achieve the
computation throughput required of such applications. Reviews
important research in key areas related to the multiprocessor
implementation of multimedia systemsEmbedded Multiprocessors:
Scheduling and Synchronization, Second Edition presents
architectures and design methodologies for parallel systems in
embedded digital signal processing (DSP) applications. It discusses
application modeling techniques for multimedia systems, the
incorporation of interprocessor communication costs into
multiprocessor scheduling decisions, and a modeling methodology
(the synchronization graph) for multiprocessor system performance
analysis. The book also applies the synchronization graph model to
develop hardware and software optimizations that can significantly
reduce the interprocessor communication overhead of a given
schedule. Chronicles recent activity dealing with single-chip
multiprocessors and dataflow modelsThis edition updates the
background material on existing embedded multiprocessors, including
single-chip multiprocessors. It also summarizes the new research on
dataflow models for signal processing that has been carried out
since the publication of the first edition. Harness the power of
multiprocessorsThis book explores the optimization of
interprocessor communication and synchronization in embedded
multiprocessor systems. It shows you how to design multiprocessor
computer systems that are streamlined for multimedia applications.
Techniques for Optimizing Multiprocessor Implementations of Signal
Processing Applications An indispensable component of the
information age, signal processing is embedded in a variety of
consumer devices, including cell phones and digital television, as
well as in communication infrastructure, such as media servers and
cellular base stations. Multiple programmable processors, along
with custom hardware running in parallel, are needed to achieve the
computation throughput required of such applications. Reviews
important research in key areas related to the multiprocessor
implementation of multimedia systemsEmbedded Multiprocessors:
Scheduling and Synchronization, Second Edition presents
architectures and design methodologies for parallel systems in
embedded digital signal processing (DSP) applications. It discusses
application modeling techniques for multimedia systems, the
incorporation of interprocessor communication costs into
multiprocessor scheduling decisions, and a modeling methodology
(the synchronization graph) for multiprocessor system performance
analysis. The book also applies the synchronization graph model to
develop hardware and software optimizations that can significantly
reduce the interprocessor communication overhead of a given
schedule. Chronicles recent activity dealing with single-chip
multiprocessors and dataflow modelsThis edition updates the
background material on existing embedded multiprocessors, including
single-chip multiprocessors. It also summarizes the new research on
dataflow models for signal processing that has been carried out
since the publication of the first edition. Harness the power of
multiprocessorsThis book explores the optimization of
interprocessor communication and synchronization in embedded
multiprocessor systems. It shows you how to design multiprocessor
computer systems that are streamlined for multimedia applications.
This Festschrift is in honor of Marilyn Wolf, on the occasion of
her 60th birthday. Prof. Wolf is a renowned researcher and educator
in Electrical and Computer Engineering, who has made pioneering
contributions in all of the major areas in Embedded,
Cyber-Physical, and Internet of Things (IoT) Systems. This book
provides a timely collection of contributions that cover important
topics related to Smart Cameras, Hardware/Software Co-Design, and
Multimedia applications. Embedded systems are everywhere;
cyber-physical systems enable monitoring and control of complex
physical processes with computers; and IoT technology is of
increasing relevance in major application areas, including factory
automation, and smart cities. Smart cameras and multimedia
technologies introduce novel opportunities and challenges in
embedded, cyber-physical and IoT applications. Advanced
hardware/software co-design methodologies provide valuable concepts
and tools for addressing these challenges. The diverse topics of
the chapters in this Festschrift help to reflect the great breadth
and depth of Marilyn Wolf's contributions in research and
education. The chapters have been written by some of Marilyn's
closest collaborators and colleagues.
This Festschrift is in honor of Marilyn Wolf, on the occasion of
her 60th birthday. Prof. Wolf is a renowned researcher and educator
in Electrical and Computer Engineering, who has made pioneering
contributions in all of the major areas in Embedded,
Cyber-Physical, and Internet of Things (IoT) Systems. This book
provides a timely collection of contributions that cover important
topics related to Smart Cameras, Hardware/Software Co-Design, and
Multimedia applications. Embedded systems are everywhere;
cyber-physical systems enable monitoring and control of complex
physical processes with computers; and IoT technology is of
increasing relevance in major application areas, including factory
automation, and smart cities. Smart cameras and multimedia
technologies introduce novel opportunities and challenges in
embedded, cyber-physical and IoT applications. Advanced
hardware/software co-design methodologies provide valuable concepts
and tools for addressing these challenges. The diverse topics of
the chapters in this Festschrift help to reflect the great breadth
and depth of Marilyn Wolf's contributions in research and
education. The chapters have been written by some of Marilyn's
closest collaborators and colleagues.
Software Synthesis from Dataflow Graphs addresses the problem of
generating efficient software implementations from applications
specified as synchronous dataflow graphs for programmable digital
signal processors (DSPs) used in embedded real- time systems. The
advent of high-speed graphics workstations has made feasible the
use of graphical block diagram programming environments by
designers of signal processing systems. A particular subset of
dataflow, called Synchronous Dataflow (SDF), has proven efficient
for representing a wide class of unirate and multirate signal
processing algorithms, and has been used as the basis for numerous
DSP block diagram-based programming environments such as the Signal
Processing Workstation from Cadence Design Systems, Inc., COSSAP
from Synopsys (R) (both commercial tools), and the Ptolemy
environment from the University of California at Berkeley. A key
property of the SDF model is that static schedules can be
determined at compile time. This removes the overhead of dynamic
scheduling and is thus useful for real-time DSP programs where
throughput requirements are often severe. Another constraint that
programmable DSPs for embedded systems have is the limited amount
of on-chip memory. Off-chip memory is not only expensive but is
also slower and increases the power consumption of the system;
hence, it is imperative that programs fit in the on-chip memory
whenever possible. Software Synthesis from Dataflow Graphs reviews
the state-of-the-art in constructing static, memory-optimal
schedules for programs expressed as SDF graphs. Code size reduction
is obtained by the careful organization of loops in the target
code. Data buffering is optimized by constructing the loop
hierarchy in provably optimal ways for many classes of SDF graphs.
The central result is a uniprocessor scheduling framework that
provably synthesizes the most compact looping structures, called
single appearance schedules, for a certain class of SDF graphs. In
addition, algorithms and heuristics are presented that generate
single appearance schedules optimized for data buffering usage.
Numerous practical examples and extensive experimental data are
provided to illustrate the efficacy of these techniques.
As a graduate student at Ohio State in the mid-1970s, I inherited a
unique c- puter vision laboratory from the doctoral research of
previous students. They had designed and built an early
frame-grabber to deliver digitized color video from a (very large)
electronic video camera on a tripod to a mini-computer (sic) with a
(huge ) disk drive-about the size of four washing machines. They
had also - signed a binary image array processor and programming
language, complete with a user's guide, to facilitate designing
software for this one-of-a-kindprocessor. The overall system
enabled programmable real-time image processing at video rate for
many operations. I had the whole lab to myself. I designed software
that detected an object in the eldofview,
trackeditsmovementsinrealtime, anddisplayedarunningdescription of
the events in English. For example: "An object has appeared in the
upper right
corner...Itismovingdownandtotheleft...Nowtheobjectisgettingcloser...The
object moved out of sight to the left"-about like that. The
algorithms were simple, relying on a suf cient image intensity
difference to separate the object from the background (a plain
wall). From computer vision papers I had read, I knew that vision
in general imaging conditions is much more sophisticated. But it
worked, it was great fun, and I was hooked.
It gives me immense pleasure to introduce this timely handbook to
the research/- velopment communities in the ?eld of signal
processing systems (SPS). This is the ?rst of its kind and
represents state-of-the-arts coverage of research in this ?eld. The
driving force behind information technologies (IT) hinges
critically upon the major advances in both component integration
and system integration. The major breakthrough for the former is
undoubtedly the invention of IC in the 50's by Jack S. Kilby, the
Nobel Prize Laureate in Physics 2000. In an integrated circuit, all
components were made of the same semiconductor material. Beginning
with the pocket calculator in 1964, there have been many
increasingly complex applications followed. In fact, processing
gates and memory storage on a chip have since then grown at an
exponential rate, following Moore's Law. (Moore himself admitted
that Moore's Law had turned out to be more accurate, longer lasting
and deeper in impact than he ever imagined. ) With greater device
integration, various signal processing systems have been realized
for many killer IT applications. Further breakthroughs in computer
sciences and Internet technologies have also catalyzed large-scale
system integration. All these have led to today's IT revolution
which has profound impacts on our lifestyle and overall prospect of
humanity. (It is hard to imagine life today without mobiles or
Internets ) The success of SPS requires a well-concerted integrated
approach from mul- ple disciplines, such as device, design, and
application.
As a graduate student at Ohio State in the mid-1970s, I inherited a
unique c- puter vision laboratory from the doctoral research of
previous students. They had designed and built an early
frame-grabber to deliver digitized color video from a (very large)
electronic video camera on a tripod to a mini-computer (sic) with a
(huge ) disk drive-about the size of four washing machines. They
had also - signed a binary image array processor and programming
language, complete with a user's guide, to facilitate designing
software for this one-of-a-kindprocessor. The overall system
enabled programmable real-time image processing at video rate for
many operations. I had the whole lab to myself. I designed software
that detected an object in the eldofview,
trackeditsmovementsinrealtime, anddisplayedarunningdescription of
the events in English. For example: "An object has appeared in the
upper right
corner...Itismovingdownandtotheleft...Nowtheobjectisgettingcloser...The
object moved out of sight to the left"-about like that. The
algorithms were simple, relying on a suf cient image intensity
difference to separate the object from the background (a plain
wall). From computer vision papers I had read, I knew that vision
in general imaging conditions is much more sophisticated. But it
worked, it was great fun, and I was hooked.
In this new edition of the Handbook of Signal Processing Systems,
many of the chapters from the previous editions have been updated,
and several new chapters have been added. The new contributions
include chapters on signal processing methods for light field
displays, throughput analysis of dataflow graphs, modeling for
reconfigurable signal processing systems, fast Fourier transform
architectures, deep neural networks, programmable architectures for
histogram of oriented gradients processing, high dynamic range
video coding, system-on-chip architectures for data analytics,
analysis of finite word-length effects in fixed-point systems, and
models of architecture. There are more than 700 tables and
illustrations; in this edition over 300 are in color. This new
edition of the handbook is organized in three parts. Part I
motivates representative applications that drive and apply
state-of-the art methods for design and implementation of signal
processing systems; Part II discusses architectures for
implementing these applications; and Part III focuses on compilers,
as well as models of computation and their associated design tools
and methodologies.
Software Synthesis from Dataflow Graphs addresses the problem of
generating efficient software implementations from applications
specified as synchronous dataflow graphs for programmable digital
signal processors (DSPs) used in embedded real- time systems. The
advent of high-speed graphics workstations has made feasible the
use of graphical block diagram programming environments by
designers of signal processing systems. A particular subset of
dataflow, called Synchronous Dataflow (SDF), has proven efficient
for representing a wide class of unirate and multirate signal
processing algorithms, and has been used as the basis for numerous
DSP block diagram-based programming environments such as the Signal
Processing Workstation from Cadence Design Systems, Inc., COSSAP
from SynopsysA(R) (both commercial tools), and the Ptolemy
environment from the University of California at Berkeley. A key
property of the SDF model is that static schedules can be
determined at compile time. This removes the overhead of dynamic
scheduling and is thus useful for real-time DSP programs where
throughput requirements are often severe. Another constraint that
programmable DSPs for embedded systems have is the limited amount
of on-chip memory. Off-chip memory is not only expensive but is
also slower and increases the power consumption of the system;
hence, it is imperative that programs fit in the on-chip memory
whenever possible. Software Synthesis from Dataflow Graphs reviews
the state-of-the-art in constructing static, memory-optimal
schedules for programs expressed as SDF graphs. Code size reduction
is obtained by the careful organization of loops in the target
code. Data buffering is optimized byconstructing the loop hierarchy
in provably optimal ways for many classes of SDF graphs. The
central result is a uniprocessor scheduling framework that provably
synthesizes the most compact looping structures, called single
appearance schedules, for a certain class of SDF graphs. In
addition, algorithms and heuristics are presented that generate
single appearance schedules optimized for data buffering usage.
Numerous practical examples and extensive experimental data are
provided to illustrate the efficacy of these techniques.
Although programming in memory-restricted environments is never
easy, this holds especially true for digital signal processing
(DSP). The data-rich, computation-intensive nature of DSP makes
memory management a chief and challenging concern for designers.
Memory Management for Synthesis of DSP Software focuses on
minimizing memory requirements during the synthesis of DSP software
from dataflow representations. Dataflow representations are used in
many popular DSP design tools, and the methods of this book can be
applied in that context, as well as other contexts where dataflow
is used. This book systematically reviews research conducted by the
authors on memory minimization techniques for compiling synchronous
dataflow (SDF) specifications. Beginning with an overview of the
foundations of software synthesis techniques from SDF descriptions,
it examines aggressive buffer-sharing techniques that take
advantage of specific and quantifiable tradeoffs between code size
and buffer size to achieve high levels of buffer memory
optimization. The authors outline coarse-level strategies using
lifetime analysis and dynamic storage allocation (DSA) for
efficient buffer sharing as one approach and demonstrate the role
of the CBP (consumed-before-produced) parameter at a finer level
using a merging framework for buffer sharing. They present two
powerful algorithms for combining these sharing techniques and then
introduce techniques that are not restricted to the single
appearance scheduling space of the other techniques. Extensively
illustrated to clarify the mathematical concepts, Memory Management
for Synthesis of DSP Software presents a comprehensive survey of
state-of-the-art research in DSPsoftware synthesis.
Handbook of Signal Processing Systems is organized in three parts.
The first part motivates representative applications that drive and
apply state-of-the art methods for design and implementation of
signal processing systems; the second part discusses architectures
for implementing these applications; the third part focuses on
compilers and simulation tools, describes models of computation and
their associated design tools and methodologies. This handbook is
an essential tool for professionals in many fields and researchers
of all levels.
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